Our work

Towards high throughput scanning probe microscopy (Spm)

Due to the ever increasing metrology requirements for 1X nm node fabrication, measurements of sub-10 nm defects are required and recognized as one of the challenges for blank and patterned wafers and masks. These metrology requirements are not yet being appropriately met by existing techniques, since they are already performing at the edge of their performance.

Scanning probe microscopy (SPM) has been suggested as one of the technologies that can fulfil the future metrology and inspection requirements, because it has the distinct advantage of being able to discern in 3D the atomic structure of the substrate. TNO has an excellent technology which enables operation of many miniaturized SPM heads on a relatively large sample, such as a wafer or mask which enables a ground breaking increase in SPM throughput.

Why?

  • Comply to ITRS metrology roadmap
  • Enabling High Throughput SPM (>7 wafers/hour @450 mm*)
  • Fulfill the requirements for future industrial metrology and inspection
  • Prevention of contamination during metrology
  • Easy & fast measurement of complex nanostructures

How?

  • 50 parallel, miniaturized, SPM scan heads
  • A revolutionary mechatronics positioning system for positioning and fixing mini SPMs
  • Automatic probe exchange unit
  • High performance wafer stage with wafer clamp
  • Wafer handler for aligning, loading and unloading
  • Calibration facilities and environmental conditioning

What?

  • Defect Inspection on Semicon Bare wafers and Blank masks (sub-10 nm up to 2 µm)
  • Defect Inspection on Semicon patterned wafers (sub-10 nm up to 2 µm)
  • Defect Review on Semicon Bare wafers and Blank masks (@1 nm lateral resolution)
  • Defect Review on Semicon patterned wafers
    (@1 nm lateral resolution)
  • Process controls such as CMP, Etch depth, roughness

 

Trends


In electronics

  • Need for defect free IC
  • Decreasing feature size (22 nm towards 10 nm Node)
  • Wafers are getting bigger
  • Equipment should be better designed to avoid contamination
  • Increase in complexity and performance level of devices

In metrology

  • Throughput of current state-of-the-art SPMs are extremely low
  • Increased metrology requirements @nano scale
  • Amount of necessary metrology steps is increasing, it needs to be fast and simple
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Contact

Dr Rob Willekers

  • Space Systems Engineering

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